Inventor · Radebeul, DE

Thomas Feudel

30Patents
7h-index
28Co-inventors
65Inventor score

Filing activity: Mar 14, 2001 → Feb 22, 2012

Most-cited inventions

PatentTitleAreaCited byStatus
US7208397B2 Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same Electricity 12 Expired
US7754556B2 Reducing transistor junction capacitance by recessing drain and source regions Electricity 12 Active
US6821840B2 Semiconductor device including a field effect transistor and a passive capacitor having reduced leakage current and an improved capacitance per unit area Emerging Cross-Sectional Technologies 10 Expired
US6593175B2 Method of controlling a shape of an oxide layer formed on a substrate Electricity 9 Expired
US6821887B2 Method of forming a metal silicide gate in a standard MOS process sequence Electricity 9 Expired
US6897114B2 Methods of forming a transistor having a recessed gate electrode structure Electricity 8 Expired
US7964970B2 Technique for enhancing transistor performance by transistor specific contact design Electricity 8 Active
US6808970B2 Semiconductor device having an improved strained surface layer and method of forming a strained surface layer in a semiconductor device Electricity 7 Expired
US7799682B2 Transistor having a locally provided metal silicide region in contact areas and a method of forming the transistor Electricity 7 Active
US6410410B1 Method of forming lightly doped regions in a semiconductor device Electricity 6 Expired
US6846708B2 Semiconductor device having improved doping profiles and a method of improving the doping profiles of a semiconductor device Electricity 6 Expired
US7955937B2 Method for manufacturing semiconductor device comprising SOI transistors and bulk transistors Electricity 5 Active
US6849516B2 Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer Electricity 5 Expired
US8541885B2 Technique for enhancing transistor performance by transistor specific contact design Electricity 3 Active
US8143133B2 Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes Electricity 3 Active
US8338885B2 Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes Electricity 3 Active
US7419867B2 CMOS gate structure comprising predoped semiconductor gate material with improved uniformity of dopant distribution and method of forming the structure Electricity 2 Active
US6924216B2 Semiconductor device having improved doping profiles and method of improving the doping profiles of a semiconductor device Electricity 2 Expired
US7745334B2 Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques Electricity 2 Active
US6806153B2 Method of manufacturing a field effect transistor Electricity 2 Expired
US6822430B2 Method of assessing lateral dopant and/or charge carrier profiles Electricity 1 Expired
US7494872B2 Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor Electricity 1 Active
US7338872B2 Method of depositing a layer of a material on a substrate Electricity 1 Expired
US6905924B2 Diode structure for SOI circuits Electricity 1 Expired
US8586440B2 Methods for fabricating integrated circuits using non-oxidizing resist removal Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.