Trench-gated MIS device having thick polysilicon insulation layer at trench bottom and method of fabricating the same

US7494876B1 · kind B1 · utility

Assignee

• Vishay-Siliconix, LLC · US

Inventors

• Frederick P. Giles · San Jose, US
• Kam Hong Lui · Santa Clara, US

Key dates

• Filing date: Apr 21, 2005
• Grant date: Feb 24, 2009
• Expiry date: Apr 21, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/516

Abstract

In a trench-gated MIS semiconductor device, a slug of undoped polysilicon is deposited at the bottom of the trench to protect the gate oxide in this area against the high electric fields that can occur in this area. The slug is formed over a thick oxide layer at the bottom of the trench. A process of fabricating the MOSFET includes the steps of growing a thick oxide layer on the sidewalls and bottom of the trench, depositing a polysilicon layer which remains undoped, etching the polysilicon layer to form the plug, etching the exposed portion of the thick oxide layer, growing a gate oxide layer and an oxide layer over the plug, and depositing and doping a polysilicon layer which serves as the gate electrode. In an alternative embodiment, the oxide layer overlying the plug is etched before the gate polysilicon is deposited such that the dopant introduced into the gate polysilicon migrates into the polysilicon plug. In this embodiment, the polysilicon plug is in electrical contact with the gate polysilicon layer and is separated from the drain by the thick oxide layer.