Plasma pre-treating surfaces for atomic layer deposition
US7498242B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2006 |
| Grant date | Mar 3, 2009 |
| Priority date | — |
| Expiry date | Jul 14, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76873
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Preferred embodiments are directed to providing conformal lining over openings formed in porous materials. Trenches are formed in, preferably, insulating layers. The layers are then adequately treated with a particular plasma process. Following this plasma treatment a self-limiting, self-saturating atomic layer deposition (ALD) reaction can occur without significantly filling the pores forming improved interconnects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.