Method of forming trench gate field effect transistor with recessed mesas
US7504306B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2006 |
| Grant date | Mar 17, 2009 |
| Priority date | — |
| Expiry date | Jul 11, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A monolithically integrated field effect transistor and Schottky diode includes gate trenches extending into a semiconductor region. Source regions having a substantially triangular shape flank each side of the gate trenches. A contact opening extends into the semiconductor region between adjacent gate trenches. A conductor layer fills the contact opening to electrically contact: (a) the source regions along at least a portion of a slanted sidewall of each source region, and (b) the semiconductor region along a bottom portion of the contact opening, wherein the conductor layer forms a Schottky contact with the semiconductor region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.