Method for producing semiconductor wafer and semiconductor wafer
US7507146B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2005 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Oct 12, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02021
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
The present invention is a method for producing a semiconductor wafer, comprising: at least a double-side polishing step; and a chamfered-portion polishing step; wherein as a first chamfered-portion polishing step, at least, a chamfered portion of the wafer is polished so that a chamfered surface of each of main surface sides in the chamfered portion is in contact with a polishing pad; then the double-side polishing is performed; as a second chamfered-portion polishing step, at least, the chamfered portion of the wafer is polished so that an end surface of the chamfered portion is in contact with a polishing pad and so that both main surfaces of the wafer are not in contact with a polishing pad. Thereby, when a semiconductor wafer is produced, scratch and such generated in the chamfered portion in a double-side polishing process can be removed and, excessive polishing in a peripheral portion of a main surface can be prevented from being caused in polishing a chamfered portion. Therefore, a method for producing a semiconductor wafer having a high flatness even in the vicinity of a chamfered portion, and the semiconductor wafer are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.