Method for fabricating storage node contact in semiconductor device
US7507657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2005 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Aug 4, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for fabricating a plurality of storage node contacts in a semiconductor device capable of minimizing an influence of a slurry residue and planarizing cruspidal patterns caused during a storage node contact isolation process. In accordance with the present invention, a chemical mechanical polishing (CMP) process that is the last process of the storage node contact isolation process is performed by using the slurry without the selectivity or the reverse selectivity, thereby removing the plurality of cruspidal patterns at every interface of the plurality of bit line patterns BL and the plurality of storage node contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.