Formation of metal-insulator-metal capacitor simultaneously with aluminum metal wiring level using a hardmask
US7511940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2007 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Aug 15, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer is formed above a lower conductor layer and an upper conductor layer is formed above the dielectric layer. The invention then forms an etch stop layer above the upper conductor layer and the dielectric layer, and forms a hardmask (silicon oxide hardmask, a silicon nitride hardmask, etc.) over the etch stop layer. Next, a photoresist is patterned above the hardmask, which allows the hardmask, the etch stop layer, the dielectric layer, and the lower conductor layer to be etched through the photoresist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.