Static noise-immune SRAM cells
US7511988B2 · kind B2 · utility
9Cited by
9References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2006 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Nov 14, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4125
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory (SRAM) cell includes a first load device, a first pull-down transistor, and a switch-box coupled between the first load device and the first pull-down transistor. The switch-box is configured to receive a switch control signal to turn off a first connection between the first load device and the first pull-down transistor during read operations of the SRAM cell and to turn on the first connection during write operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.