Vertical SOI trench SONOS cell
US7514323B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2005 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Jun 6, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device in which a vertical trench semiconductor-oxide-nitride-oxide-semiconductor (SONOS) memory cell is created in a semiconductor-on-insulator (SOI) substrate is provided that allows for the integration of dense non-volatile random access memory (NVRAM) cells in SOI-based complementary metal oxide semiconductor (CMOS) technology. The trench is processed using conventional trench processing and it is processed near the beginning of the inventive method that allows for the fabrication of the memory cell to be fully separated from SOI logic processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.