Finishing process for the manufacture of a semiconductor structure
US7514341B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2006 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Jan 12, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a process for the formation of a structure comprising a thin layer made of semiconductor material on a substrate, including the steps of providing a zone of weakness in a donor substrate; bonding the donor substrate to a support substrate; detaching a portion of the donor substrate to transfer it to the support substrate, wherein the detaching includes applying heat treating the donor substrate to weaken the zone of weakness without initiating detachment and applying an energy pulse to provoke self-maintained detachment of the donor substrate portion to transfer it to the support substrate; and subjecting the transferred portion of the donor substrate to a finishing operation to form a thin layer. The finishing operation is simplified compared to that which is conducted by a conventional process that achieves detaching by applying a heat treatment to provoke self-maintained detachment of the donor substrate portion, and the thin layer has a surface of the same smoothness as one prepared by the conventional process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.