Eric Neyret
24Patents
7h-index
17Co-inventors
58Inventor score
Filing activity: Sep 25, 2003 → Jun 6, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6962858B2 | Method for reducing free surface roughness of a semiconductor wafer | Electricity | 24 | Expired |
| US7405136B2 | Methods for manufacturing compound-material wafers and for recycling used donor substrates | Electricity | 15 | Active |
| US6853802B2 | Heat treatment for edges of multilayer semiconductor wafers | Electricity | 12 | Expired |
| US8679944B2 | Progressive trimming method | Electricity | 11 | Active |
| US7081399B2 | Method for producing a high quality useful layer on a substrate utilizing helium and hydrogen implantations | Electricity | 9 | Expired |
| US6939783B2 | Preventive treatment method for a multilayer semiconductor wafer | Electricity | 8 | Expired |
| US6903032B2 | Method for preparing a semiconductor wafer surface | Electricity | 7 | Expired |
| US7514341B2 | Finishing process for the manufacture of a semiconductor structure | Electricity | 5 | Active |
| US7285471B2 | Process for transfer of a thin layer formed in a substrate with vacancy clusters | Electricity | 4 | Expired |
| US7190029B2 | Preventive treatment method for a multilayer semiconductor wafer | Electricity | 4 | Expired |
| US7138344B2 | Method for minimizing slip line faults on a semiconductor wafer surface | Electricity | 3 | Expired |
| US7883628B2 | Method of reducing the surface roughness of a semiconductor wafer | Electricity | 3 | Active |
| US7049250B2 | Heat treatment for edges of multilayer semiconductor wafers | Electricity | 2 | Expired |
| US7939427B2 | Process for fabricating a substrate of the silicon-on-insulator type with reduced roughness and uniform thickness | Electricity | 2 | Active |
| US7485545B2 | Method of configuring a process to obtain a thin layer with a low density of holes | Electricity | 2 | Active |
| US7749910B2 | Method of reducing the surface roughness of a semiconductor wafer | Electricity | 2 | Active |
| US7863158B2 | Treatment for bonding interface stabilization | Electricity | 2 | Active |
| US7666758B2 | Process for fabricating a substrate of the silicon-on-insulator type with thin surface layer | Electricity | 1 | Active |
| US8389412B2 | Finishing method for a silicon on insulator substrate | Electricity | 1 | Active |
| US7001832B2 | Method for limiting slip lines in a semiconductor substrate | Electricity | 1 | Expired |
| US8273636B2 | Process for the transfer of a thin layer formed in a substrate with vacancy clusters | Electricity | 1 | Active |
| US8461018B2 | Treatment for bonding interface stabilization | Electricity | 0 | Active |
| US7947571B2 | Method for fabricating a semiconductor on insulator substrate with reduced Secco defect density | Electricity | 0 | Active |
| US8216916B2 | Treatment for bonding interface stabilization | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.