Systems and arrangements for interconnecting integrated circuit dies
US7514773B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2006 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Feb 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit interconnection system is disclosed. The system can include a first integrated circuit die having a first electrode configuration and a second integrated die having the same or a substantially similar electrode configuration. The system can also include a multilayer flexible cable having a first side and a second side that has substantially parallel conductors running along the cable. At least a portion of one of the parallel conductors can be exposed on the first side and/or the second side, such that the first and second integrated circuit die can be connected to both the first side and the second side of the multilayer flexible cable. The cable can be folded to provide a dense interconnect for stacked memory configurations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.