Michael W. Leddige
34Patents
10h-index
46Co-inventors
75Inventor score
Filing activity: Apr 28, 1994 → Mar 13, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6587912B2 | Method and apparatus for implementing multiple memory buses on a memory module | Physics | 322 | Expired |
| US6477614B1 | Method for implementing multiple memory buses on a memory module | Physics | 244 | Expired |
| US6144576A | Method and apparatus for implementing a serial memory architecture | Physics | 147 | Expired |
| US6005776A | Vertical connector based packaging solution for integrated circuits | Emerging Cross-Sectional Technologies | 84 | Expired |
| US7402048B2 | Technique for blind-mating daughtercard to mainboard | Electricity | 62 | Expired |
| US6353539B1 | Method and apparatus for matched length routing of back-to-back package placement | Electricity | 40 | Expired |
| US6366466B1 | Multi-layer printed circuit board with signal traces of varying width | Electricity | 22 | Expired |
| US7772708B2 | Stacking integrated circuit dies | Electricity | 20 | Active |
| US6111205A | Via pad geometry supporting uniform transmission line structures | Electricity | 20 | Expired |
| US5513073A | Optical device heat spreader and thermal isolation apparatus | Physics | 20 | Expired |
| US6891899B2 | System and method for bit encoding to increase data transfer rate | Electricity | 10 | Expired |
| US6788222B2 | Low weight data encoding for minimal power delivery impact | Electricity | 10 | Expired |
| US6362973B1 | Multilayer printed circuit board with placebo vias for controlling interconnect skew | Electricity | 9 | Expired |
| US6515555B2 | Memory module with parallel stub traces | Electricity | 5 | Expired |
| US6711640B1 | Split delay transmission line | Electricity | 5 | Expired |
| US8438515B2 | Interchangeable connection arrays for double-sided DIMM placement | Emerging Cross-Sectional Technologies | 5 | Active |
| US8099687B2 | Interchangeable connection arrays for double-sided DIMM placement | Emerging Cross-Sectional Technologies | 5 | Active |
| US7133962B2 | Circulator chain memory command and address bus topology | Physics | 5 | Expired |
| US6724082B2 | Systems having modules with selectable on die terminations | Electricity | 4 | Expired |
| US7194572B2 | Memory system and method to reduce reflection and signal degradation | Physics | 4 | Expired |
| US6686762B2 | Memory module using DRAM package to match channel impedance | Physics | 4 | Expired |
| US9391378B2 | High bandwidth connector for internal and external IO interfaces | Emerging Cross-Sectional Technologies | 4 | Active |
| US7514773B2 | Systems and arrangements for interconnecting integrated circuit dies | Electricity | 3 | Active |
| US6631083B2 | Systems with modules and clocking therefore | Electricity | 3 | Expired |
| US6918078B2 | Systems with modules sharing terminations | Electricity | 3 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.