Patent · US Active

CBRAM cell and CBRAM array, and method of operating thereof

US7515454B2 · kind B2 · utility

37Cited by

2References

24Claims

0Family size

Assignees

Infineon Technologies AG · DE
Altis Semiconductor, SNC · FR

Inventor

Ralf Symanczyk · Bad Aibling, DE

Key dates

Filing date	Aug 2, 2006
Grant date	Apr 7, 2009
Priority date	—
Expiry date	Jul 7, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH10B63/10
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

According to one embodiment of the present invention, a CBRAM cell includes a solid electrolyte block having at least three solid electrolyte contacting areas, electrodes electrically connected to the solid electrolyte contacting areas, wherein conductive paths are formable, erasable or detectable within the solid electrolyte block by applying voltages between the solid electrolyte contacting areas using the electrodes as voltage suppliers, and wherein the contacting areas are spatially separated from each other such that conductive paths starting from different solid electrolyte contacting areas or ending at different solid electrolyte contacting areas do not overlap each other.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.