Patent · US Active

Wafer container with secondary wafer restraint system

US7523830B2 · kind B2 · utility

9Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 22, 2005
Grant dateApr 28, 2009
Priority date
Expiry dateApr 18, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/67369
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A wafer container providing improved wafer restraint during physical shock events. In embodiments of the invention, a secondary wafer restraint structure defining a plurality of notches is interposed between opposing wafer restraint members on the door of the container. The notches may be defined by one or more converging edges or surfaces meeting at a junction. The junctions are positioned so as to align with the wafer receiving portions of each opposing pair of wafer restraint member so that when the door is fully sealingly engaged with the enclosure of the container, the edge of the wafer is contacting the junction. In this position, any vertical movement of the wafer due to shock imparted to the container causes the wafer to contact the converging surfaces or edges, thereby limiting such movement. The positioning of the secondary wafer restraint structure between and proximate opposing fingers of the primary wafer restraint limits deflection of the wafer between support points and thereby further inhibits the wafer from “jumping” out of the supports and cross-slotting.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.