Electronic component and a panel
US7524699B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2004 |
| Grant date | Apr 28, 2009 |
| Priority date | — |
| Expiry date | Jul 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One embodiment of the invention relates to an electronic component having stacked semiconductor chips, and to a panel for production of the component. In one case, the stack has a flat conductor structure with a chip island on which a stacked semiconductor chip is arranged, while a first semiconductor chip is located underneath it. The chip island is surrounded by flat conductors which have contact pillars. These contact pillars have pillar contact pads which, together with the active upper face of the first semiconductor chip and the upper face areas of a plastic encapsulation compound form a coplanar overall upper face.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.