Method for manufacturing semiconductor device
US7524738B2 · kind B2 · utility
2Cited by
2References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 30, 2005 |
| Grant date | Apr 28, 2009 |
| Priority date | — |
| Expiry date | Jan 24, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76838
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a method for manufacturing a semiconductor device. According to the present invention, a dummy contact hole is formed in a scribe lane by employing a direct polyimide etching (‘DPE’) process reducing the two steps of a masking process to one step and a passivation layer filling up the dummy contact hole is formed to mechanically support the stress generated in a subsequent annealing process, thereby preventing a crack as a particle source in a packaging process from occurring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.