Diagnostic interface architecture for memory device
US7526692B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2004 |
| Grant date | Apr 28, 2009 |
| Priority date | — |
| Expiry date | Feb 8, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A diagnostic interface architecture for a memory device supports in one aspect one or more dynamically reconfigurable functional interconnects normally utilized in connection with reading data from the memory device and/or writing data to the memory device. The dynamically reconfigurable functional interconnects are capable of being configured to operate in either functional or diagnostic modes, whereby in the diagnostic mode, such interconnects may be used to communicate diagnostic information to support one or more diagnostic operations. The diagnostic interface architecture may also support multiple diagnostic interfaces in a given memory device, with at least one such diagnostic interface being capable of being selectively enabled in response to a failure in another diagnostic interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.