Inventor · Rochester, MN, US

John Michael Borkenhagen

95Patents
18h-index
79Co-inventors
87Inventor score

Filing activity: Nov 16, 1987 → Aug 6, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US6212544A Altering thread priorities in a multithreaded processor Physics 355 Expired
US6567839B1 Thread switch control in a multithreaded processor system Physics 236 Expired
US6076157A Method and apparatus to force a thread switch in a multithreaded processor Physics 200 Expired
US6697935B1 Method and apparatus for selecting thread switch events in a multithreaded processor Physics 169 Expired
US6105051A Apparatus and method to guarantee forward progress in execution of threads in a multithreaded processor Physics 91 Expired
US6088788A Background completion of instruction and associated fetch request in a multithread processor Physics 80 Expired
US6442102B1 Method and apparatus for implementing high speed DDR SDRAM read interface with reduced ACLV effects Physics 47 Expired
US6760856B1 Programmable compensated delay for DDR SDRAM interface using programmable delay loop for reference calibration Physics 46 Expired
US6754858B2 SDRAM address error detection method and apparatus Physics 43 Expired
US6940760B2 Data strobe gating for source synchronous communications interface Physics 41 Expired
US7254663B2 Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modes Physics 33 Expired
US6263404A Accessing data from a multiple entry fully associative cache buffer in a multithread data processing system Physics 33 Expired
US6151664A Programmable SRAM and DRAM cache interface with preset access priorities Physics 29 Expired
US7334070B2 Multi-channel memory architecture for daisy chained arrangements of nodes with bridging between memory channels Physics 27 Expired
US8547825B2 Switch fabric management Electricity 25 Active
US5790843A System for modifying microprocessor operations independently of the execution unit upon detection of preselected opcodes Physics 23 Expired
US7496711B2 Multi-level memory architecture with data prioritization Physics 19 Active
US5067105A System and method for automatically configuring translation of logical addresses to a physical memory address in a computer memory system Physics 19 Expired
US6044447A Method and apparatus for communicating translation command information in a multithreaded environment Physics 16 Expired
US6839816B2 Shared cache line update mechanism Physics 13 Expired
US7309911B2 Method and stacked memory structure for implementing enhanced cooling of memory devices Electricity 13 Expired
US8010215B2 Structure for selecting processors for job scheduling using measured power consumption Emerging Cross-Sectional Technologies 13 Active
US6671211B2 Data strobe gating for source synchronous communications interface Physics 11 Expired
US7707379B2 Dynamic latency map for memory optimization Physics 11 Active
US7613870B2 Efficient memory usage in systems including volatile and high-density memories Emerging Cross-Sectional Technologies 10 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.