Semiconductor integrated circuit devices having high-Q wafer backside inductors and methods of fabricating same
US7531407B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2006 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Nov 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are provided for fabricating semiconductor IC (integrated circuit) chips having high-Q on-chip inductors formed on the chip backside and connected to integrated circuits on the chip frontside using through-wafer interconnects. For example, a semiconductor device with a backside integrated inductor includes a semiconductor substrate having a frontside, a backside and a buried insulating layer interposed between the front and backsides of the substrate. An integrated circuit is formed on the frontside of the semiconductor substrate and an integrated inductor is formed on the backside of the semiconductor substrate. An interconnection structure is formed through the buried insulating layer to connect the integrated inductor to the integrated circuit. The semiconductor substrate may be an SOI (silicon on insulator) structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.