High voltage non punch through IGBT for switch mode power supplies

US7534666B2 · kind B2 · utility

Assignee

• International Rectifier Corporation · US

Inventors

• Richard Francis · Manhattan Beach, US
• Chiu Ng · El Segundo, US

Key dates

• Filing date: Jul 27, 2005
• Grant date: May 19, 2009
• Expiry date: Jun 30, 2026

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/904

Abstract

A process for forming an NPT IGBT in a thin N type silicon wafer in which the bottom surface of a thin silicon wafer (100 microns thick or less) has a shallow reduced lifetime region in its bottom formed by a light species atom implant to a depth of less than about 2.5 microns. A P+ transparent collector region about 0.5 microns deep is formed in the bottom of the damaged region by a boron implant. A collector contact of Al/Ti/NiV and Ag is sputtered onto the collector region and is annealed at 200° C. to 400° C. for 30 to 60 minutes. A pre-anneal step before applying the collector metal can be carried out in vacuum at 300° C. to 400° C. for 30 to 60 seconds.