Method for correcting for asymmetry of threshold voltage shifts
US7541829B1 · kind B1 · utility
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4References
1Claims
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Key dates
| Filing date | Jun 2, 2008 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Jun 2, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2879
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for correcting of asymmetric shifts in threshold voltage of transistors caused by effects such as negative-bias temperature instability (NBTI) during burn-in. The method may include providing logic patterns to an integrated circuit, such that devices that were stressed during burn-in are relaxed, and devices that suffered less stress during burn-in are stressed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.