Method and apparatus to reduce random yield loss
US7543255B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2007 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Jul 14, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention provides a system that reduces random yield loss. During operation, the system can receive a design layout. The system may also receive weighting factors that are associated with the particle densities in the metal regions and the empty regions. Next, the system can determine local critical-area-ratios and optimization potentials for a set of wire-segments. The system can then select a wire segment, and compare its local critical-area-ratio with a global critical-area-ratio. Next, the system can use the result of the comparison to determine a layout optimization. The system can then apply the layout optimization to the wire segment to obtain an improved layout.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.