Integrated circuit and method for manufacturing
US7543917B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2006 |
| Grant date | Jun 9, 2009 |
| Priority date | — |
| Expiry date | May 25, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldTextile and paper machines
- WIPO sectorMechanical engineering
Abstract
A method of forming a semiconductor device, the method including forming a substrate including a first surface having a non-doped region, forming an insulative material over the first surface of the substrate, forming a first conductive material over the first insulative material, forming an opening in the first conductive material that forms a path to the substrate that is substantially free of the first conductive material and the first insulative material, forming a second insulative material over the first conductive material, and forming a second conductive material over the second insulative material, wherein the second conductive material is formed in the opening and contacts the non-doped region of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.