Gate defined Schottky diode

US7544557B2 · kind B2 · utility

Assignee

• TOWER PARTNERS SEMICONDUCTOR CO., LTD. · IL

Inventors

• Sharon Levin · Haifa, IL
• Shye Shapira · Allentown, US
• Ira Naot · Jerusalem, IL
• Robert J. Strain · San Jose, US
• Yossi Netzer · Hadera, IL

Key dates

• Filing date: Oct 21, 2005
• Grant date: Jun 9, 2009
• Expiry date: Feb 3, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/601

Abstract

A Schottky diode exhibiting low series resistance is efficiently fabricated using a substantially standard CMOS process flow by forming the Schottky diode using substantially the same structures and processes that are used to form a field effect transistor (FET) of a CMOS IC device. Polycrystalline silicon, which is used to form the gate structure of the FET, is utilized to form an isolation structure between the Schottky barrier and backside structure of the Schottky diode. Silicide (e.g., cobalt silicide (CoSi2)) structures, which are utilized to form source and drain metal-to-silicon contacts in the FET, are used to form the Schottky barrier and backside Ohmic contact of the Schottky diode. Heavily doped drain (HDD) diffusions and lightly doped drain (LDD) diffusions, which are used to form source and drain diffusions of the FET, are utilized to form a suitable contact diffusion under the backside contact silicide.