Patent · US Active

Resistive memory device

US7545669B2 · kind B2 · utility

2Cited by
17References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 6, 2008
Grant dateJun 9, 2009
Priority date
Expiry dateFeb 6, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2213/79
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A system having a memory cell. In certain embodiments, the memory cell includes a resistive memory element, an access transistor having a gate, a first terminal, and a second terminal, and a control transistor having a gate, a first terminal, and a second terminal. The first terminal of the access transistor may be coupled to the resistive memory element, and the gate of the access transistor may be coupled to the gate of the control transistor. Additionally, the first terminal of the control transistor may be coupled to the resistive memory element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.