Inventor · Boise, ID, US

Mike Violette

46Patents
12h-index
21Co-inventors
81Inventor score

Filing activity: Jan 23, 1996 → Jun 2, 2016

Most-cited inventions

PatentTitleAreaCited byStatus
US6376284B1 Method of fabricating a memory device Electricity 215 Expired
US6653733B1 Conductors in semiconductor devices Electricity 61 Expired
US6369431B1 Method for forming conductors in semiconductor devices Electricity 50 Expired
US7800092B2 Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using Emerging Cross-Sectional Technologies 33 Active
US6700211B2 Method for forming conductors in semiconductor devices Electricity 32 Expired
US6670713B2 Method for forming conductors in semiconductor devices Electricity 23 Expired
US7859893B2 Phase change memory structure with multiple resistance states and methods of programming and sensing same Emerging Cross-Sectional Technologies 16 Active
US7952919B2 Phase change memory structure with multiple resistance states and methods of programming and sensing same Emerging Cross-Sectional Technologies 15 Active
US7684227B2 Resistive memory architectures with multiple memory cells per access device Physics 14 Active
US6812529B2 Suppression of cross diffusion and gate depletion Electricity 14 Expired
US7397689B2 Resistive memory device Physics 13 Active
US7745231B2 Resistive memory cell fabrication methods and devices Electricity 12 Active
US6893957B2 Method of forming a dual damascene interconnect by selective metal deposition Electricity 12 Expired
US6723597B2 Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same Electricity 11 Expired
US6534866B1 Dual damascene interconnect Electricity 10 Expired
US6563220B2 Method for forming conductors in semiconductor devices Electricity 10 Expired
US6127236A Method of forming a lateral bipolar transistor Electricity 8 Expired
US6489665B2 Lateral bipolar transistor Electricity 7 Expired
US6594172B2 Method of selectively forming local interconnects using design rules Electricity 6 Expired
US5945726A Lateral bipolar transistor Electricity 5 Expired
US6962841B2 Suppression of cross diffusion and gate depletion Electricity 5 Expired
US6724089B2 Dual damascene interconnect Electricity 5 Expired
US6535413B1 Method of selectively forming local interconnects using design rules Electricity 5 Expired
US6090685A Method of forming a LOCOS trench isolation structure Emerging Cross-Sectional Technologies 4 Expired
US6900494B2 Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same Electricity 4 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.