Nonplanar device with thinned lower body portion and method of fabrication
US7550333B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2006 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | Aug 7, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/978
Abstract
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface. A gate dielectric layer is formed on the top surface of the semiconductor body and on the sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric layer on the top surface and sidewalls of the semiconductor body. A pair of source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.