Method of forming thin SGOI wafers with high relaxation and low stacking fault defect density

US7550370B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Huajie Chen · Danbury, US
• Stephen W. Bedell · Wappingers Falls, US
• Devendra K. Sadana · Pleasantville, US
• Dan M. Mocuta · Herent, BE

Key dates

• Filing date: Jan 16, 2004
• Grant date: Jun 23, 2009
• Expiry date: Jan 16, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/01
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method of forming a silicon germanium on insulator (SGOI) structure. A SiGe layer is deposited on an SOI wafer. Thermal mixing of the SiGe and Si layers is performed to form a thick SGOI with high relaxation and low stacking fault defect density. The SiGe layer is then thinned to a desired final thickness. The Ge concentration, the amount of relaxation, and stacking fault defect density are unchanged by the thinning process. A thin SGOI film is thus obtained with high relaxation and low stacking fault defect density. A layer of Si is then deposited on the thin SGOI wafer. The method of thinning includes low temperature (550° C.-700° C.) HIPOX or steam oxidation, in-situ HCl etching in an epitaxy chamber, or CMP. A rough SiGe surface resulting from HIPOX or steam oxidation thinning is smoothed with a touch-up CMP, in-situ hydrogen bake and SiGe buffer layer during strained Si deposition, or heating the wafer in a hydrogen environment with a mixture of gases HCl, DCS and GeH4.