Queueing system for processors in packet routing operations
US7551626B2 · kind B2 · utility
2Cited by
84References
40Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2006 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | Jul 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/205
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a data-packet processor, a configurable queueing system for packet accounting during processing has a plurality of queues arranged in one or more clusters, an identification mechanism for creating a packet identifier for arriving packets, insertion logic for inserting packet identifiers into queues and for determining into which queue to insert a packet identifier, and selection logic for selecting packet identifiers from queues to initiate processing of identified packets, downloading of completed packets, or for requeueing of the selected packet identifiers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.