Method of forming crack arrest features in embedded device build-up package and package thereof
US7553753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2006 |
| Grant date | Jun 30, 2009 |
| Priority date | — |
| Expiry date | Sep 26, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an embedded device build-up package (10) includes forming a first plurality of features (22) over a packaging substrate (12,16,18), wherein the first plurality of features (22) comprises a first feature and a second feature, forming at least a first crack arrest feature (28) in a first crack arrest available region (26), wherein the first crack arrest available region is between the first feature and the second feature, forming a second plurality of features (32) over the first plurality of features (22) wherein the second plurality of features includes a third feature and a fourth feature, and forming at least a second crack arrest feature (36) in a second crack arrest available region (34), wherein the second crack arrest feature (36) is between the third feature and the fourth feature, and the second crack arrest feature (36) is substantially orthogonal to the first crack arrest feature (28).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.