Memory device and manufacturing method
US7554144B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2006 |
| Grant date | Jun 30, 2009 |
| Priority date | — |
| Expiry date | Jun 27, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/883
Abstract
A memory device includes first and second electrodes separated by an insulating member comprising upwardly and inwardly tapering surfaces connected by a surface segment. A bridge, comprising memory material, such as a phase change material, switchable between electrical property states by the application of energy, is positioned across the surface segment and in contact with the electrodes to define an inter-electrode path defined at least in part by the length of the surface segment. According to a method for making a memory cell device, the tapering surfaces may be created by depositing a dielectric material cap using a high density plasma (HDP) deposition procedure. The electrodes and the dielectric material cap may he planarized to create the surface segment on the dielectric material. At least one of the dielectric material depositing step and the planarizing step may be controlled so that the length of the surface and segment is within a chosen dimensional range, such as between 10 nm and 100 nm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.