Method to improve writer leakage in a SiGe bipolar device
US7557010B2 · kind B2 · utility
9Cited by
9References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2007 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Apr 13, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/969
Abstract
The invention, in one aspect, provides a method for fabricating a semiconductor device, which includes conducting an etch through an opening in an emitter layer to form a cavity from an underlying oxide layer that exposes a doped tub. A first silicon/germanium (SiGe) layer, which has a Ge concentration therein, is formed within the cavity and over the doped tub by adjusting a process parameter to induce a strain in the first SiGe layer. A second SiGe layer is formed over the first SiGe layer, and a capping layer is formed over the second SiGe layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.