Patent · US Active

Method and apparatus for eliminating noise induced errors during test of a programmable logic device

US7558995B1 · kind B1 · utility

3Cited by

3References

5Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Randy J. Simmons · San Jose, US
Teymour M. Mansour · Sunnyvale, US

Key dates

Filing date	Nov 21, 2005
Grant date	Jul 7, 2009
Priority date	—
Expiry date	Jul 7, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/318516
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A method and apparatus for substantially eliminating noise induced errors caused by a premature start-up sequence between configuration of an integrated circuit (IC) and execution of functional test vectors. A noise elimination sequence is executed, whereby the configuration bitstream associated with the IC is scanned for the existence of a start-up sequence. If found, the start-up sequence is stripped from the configuration bitstream and the IC is then configured using the modified configuration bitstream. The input/output (I/O) pins of the IC remain in a deactivated state until a startup sequence is transmitted to the IC via a Joint Test Action Group (JTAG) port of the IC, which then allows IC testing to commence.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.