Randy J. Simmons
10Patents
6h-index
23Co-inventors
62Inventor score
Filing activity: Aug 6, 2002 → Jan 3, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7124338B1 | Methods of testing interconnect lines in programmable logic devices using partial reconfiguration | Physics | 55 | Expired |
| US6889368B1 | Method and apparatus for localizing faults within a programmable logic device | Physics | 47 | Expired |
| US7262623B1 | Method for gross I/O functional test at wafer sort | Physics | 14 | Expired |
| US6944809B2 | Methods of resource optimization in programmable logic devices to reduce test time | Physics | 13 | Expired |
| US6943581B1 | Test methodology for direct interconnect with multiple fan-outs | Physics | 10 | Expired |
| US6788095B1 | Method for gross input leakage functional test at wafer sort | Physics | 7 | Expired |
| US7583102B1 | Testing of input/output devices of an integrated circuit | Electricity | 5 | Active |
| US7558995B1 | Method and apparatus for eliminating noise induced errors during test of a programmable logic device | Physics | 3 | Active |
| US10761137B1 | Flexible manufacturing flow enabled by adaptive binning system | Physics | 1 | Active |
| US8030954B1 | Internal voltage level shifting for screening cold or hot temperature defects using room temperature testing | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.