Patent · US Active

Method of making solder pad

US7566648B2 · kind B2 · utility

1Cited by

8References

14Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Heng Keong Yip · Shah Alam, MY
Thoon Khin Chang · Kajang, MY
Chee Seng Foong · Bandar Baru Sungai Buloh, MY

Key dates

Filing date	Apr 22, 2007
Grant date	Jul 28, 2009
Priority date	—
Expiry date	Apr 30, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/14
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method of making a solder pad includes providing a substrate having a metal layer formed on it, and applying a photo resist to the metal layer. The photo resist is patterned. A first etching operation is performed on the metal layer to form voids in the metal layer. A second etching operation is performed on the metal layer to form the solder pad. A solder mask is formed on the substrate and a portion of the solder pad.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.