Semiconductor device manufacturing method and manufacturing line thereof
US7566665B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2004 |
| Grant date | Jul 28, 2009 |
| Priority date | — |
| Expiry date | Apr 29, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67173
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a semiconductor device manufacturing line for applying a series of processes on a semiconductor substrate, and forming an integrated circuit on the semiconductor substrate by employing a semiconductor wafer having a diameter of 6 inches (150±3 mm: SEAJ specification) or less for the semiconductor substrate. This manufacturing line comprises two sub-lines conforming to the same specifications, each of these sub-lines is composed of a series of processing units including a film forming unit, a pattern exposure unit, an etching unit, and a test unit. In at least one pattern exposure unit and one etching unit, fine processing of 0.3 μm or less can be performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.