Circuitry for reading phase change memory cells having a clamping circuit
US7570524B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2005 |
| Grant date | Aug 4, 2009 |
| Priority date | — |
| Expiry date | Apr 28, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A read circuit for reading at least one memory cell adapted to storing a logic value, the at least one memory cell including: a storage element made of a phase-change material; and an access element for coupling the storage element to the read circuit in response to a selection of the memory cell, the read circuit including: a sense current supply arrangement for supplying a sense current to the at least one memory cell; and at least one sense amplifier for determining the logic value stored in the memory cell on the basis of a voltage developing thereacross, the at least one sense amplifier comprising a voltage limiting circuit for limiting the voltage across the memory cell for preserving the stored logic value, wherein the voltage limiting circuit includes a current sinker for sinking a clamping current, which is subtracted from the sense current and depends on the stored logic value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.