Claudio Resta
35Patents
13h-index
13Co-inventors
74Inventor score
Filing activity: Nov 18, 2003 → Aug 29, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7154774B2 | Detecting switching of access elements of phase change memory cells | Physics | 122 | Expired |
| US7388775B2 | Detecting switching of access elements of phase change memory cells | Physics | 84 | Active |
| US7050328B2 | Phase change memory device | Physics | 55 | Expired |
| US7675792B2 | Generating reference currents compensated for process variation in non-volatile memories | Physics | 47 | Active |
| US7570524B2 | Circuitry for reading phase change memory cells having a clamping circuit | Physics | 30 | Expired |
| US7075841B2 | Writing circuit for a phase change memory device | Physics | 29 | Expired |
| US7092277B2 | Phase-change memory device with biasing of deselected bit lines | Physics | 25 | Expired |
| US7885101B2 | Method for low-stress multilevel reading of phase change memory cells and multilevel phase change memory | Physics | 22 | Active |
| US7020014B2 | Circuit and method for temperature tracing of devices including an element of chalcogenic material, in particular phase change memory devices | Physics | 20 | Expired |
| US7787291B2 | Programming a multilevel phase change memory cell | Physics | 17 | Active |
| US8259515B2 | Circuitry for reading phase-change memory cells having a clamping circuit | Physics | 17 | Active |
| US7495944B2 | Reading phase change memories | Physics | 15 | Expired |
| US7149132B2 | Biasing circuit for use in a non-volatile memory device | Physics | 13 | Expired |
| US7203087B2 | Fast reading, low consumption memory device and reading method thereof | Physics | 12 | Expired |
| US7257039B2 | Bit line discharge control method and circuit for a semiconductor memory | Physics | 12 | Expired |
| US7324371B2 | Method of writing to a phase change memory device | Physics | 11 | Expired |
| US7269080B2 | Nonvolatile phase change memory device and biasing method therefor | Physics | 9 | Expired |
| US8149616B2 | Method for multilevel programming of phase change memory cells using adaptive reset pulses | Physics | 8 | Active |
| US8259525B2 | Using a bit specific reference level to read a memory | Physics | 5 | Active |
| US7068534B2 | Phase-change memory device with overvoltage protection and method for protecting a phase-change memory device against overvoltages | Physics | 5 | Expired |
| US9251897B2 | Methods for a phase-change memory array | Electricity | 4 | Active |
| US7414902B2 | Semiconductor memory device with information loss self-detect capability | Physics | 3 | Expired |
| US8098512B2 | Reading phase change memories | Physics | 3 | Active |
| US9851913B2 | Methods for operating a memory array | Electricity | 3 | Active |
| US8116159B2 | Using a bit specific reference level to read a resistive memory | Physics | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.