Nonvolatile semiconductor memory device having element isolating region of trench type
US7573092B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2006 |
| Grant date | Aug 11, 2009 |
| Priority date | — |
| Expiry date | Nov 2, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosure is semiconductor device of a selective gate region, comprising a semiconductor layer, a first insulating film formed on the semiconductor layer, a first electrode layer formed on the first insulating layer, an element isolating region comprising an element isolating insulating film formed to extend through the first electrode layer and the first insulating film to reach an inner region of the semiconductor layer, the element isolating region isolating a element region and being self-aligned with the first electrode layer, a second insulating film formed on the first electrode layer and the element isolating region, an open portion exposing a surface of the first electrode layer being formed in the second insulating film, and a second electrode layer formed on the second insulating film and the exposed surface of the first electrode layer, the second electrode layer being electronically connected to the first electrode layer via the open portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.