Magnetic memory cell with multiple-bit in stacked structure and magnetic memory device
US7577019B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2007 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Sep 12, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/935
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-bit magnetic memory cell in a stacked structure controlled by at least one read bit line and one read word line is provided. The multi-bit magnetic memory cell includes at least two magnetic memory units and a switching device. Each magnetic memory unit has a magneto-resistance value and at least the two magnetic memory units are stacked to form a circuit of serial connection or parallel connection. The circuit and the read bit line are connected. The switching device is connected to the circuit, wherein the switching device is controlled by the read word line to be conducting or non-conducting so as to connect the circuit with a ground voltage. Furthermore, a plurality of the multi-bit magnetic cells is used to form a magnetic memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.