Testing of input/output devices of an integrated circuit
US7583102B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2006 |
| Grant date | Sep 1, 2009 |
| Priority date | — |
| Expiry date | Jul 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17744
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Method and apparatus for testing input/output circuits of an integrated circuit are described. An integrated circuit includes input/output circuits having input/output pads. The input/output pads are capable of being coupled together to a tester channel. The input/output circuits each are configurable via configuration circuitry to be in either a first mode or a second mode responsive to a select circuit of the configuration circuitry coupled to receive a first input for the first mode and a second input for the second mode. The select circuit is controlled responsive to a control select signal common to all or a portion of the select circuits of each of the input/output circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.