Use of dilute steam ambient for improvement of flash devices
US7585725B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2008 |
| Grant date | Sep 8, 2009 |
| Priority date | — |
| Expiry date | Sep 4, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/681
Abstract
The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. By exposing the etched gate stack to elevated temperatures and a dilute steam ambient, additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. In the preferred embodiment, the interface is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries. At the same time, oxide in an upper storage dielectric layer (oxide -nitride-oxide or ONO) is enhanced in the dilute steam oxidation. Thermal budget can be radically conserved by growing thin oxide layers on either side of a nitride layer prior to etching, and enhancing the oxide layers by dilute steam oxidation through the exposed sidewall after etching. The thin oxide layers, like the initial tunnel oxide, serve as diffusion paths to enha…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.