Circuit and method for initializing an internal logic unit in a semiconductor memory device
US7586350B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2006 |
| Grant date | Sep 8, 2009 |
| Priority date | — |
| Expiry date | Nov 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0375
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor memory device and a driving method for initializing an internal logic circuit within the semiconductor memory device under a stable state of a source voltage without an extra reset pin. The semiconductor memory device includes a power-up signal generating unit for generating a power-up signal; an internal reset signal generating unit for generating an internal reset signal in response to a pad signal inputted from an arbitrary external pin during a test mode; an internal logic initializing signal generating unit for generating an internal logic initializing signal based on the power-up signal and the internal reset signal; and an internal logic unit initialized in response to the internal logic initializing signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.