Patent · US Active

Method of forming semiconductor device having nanotube structures

US7592248B2 · kind B2 · utility

32Cited by

3References

11Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Peter L. G. Ventzek · Austin, US
Marius Orlowski · Meylan, FR

Key dates

Filing date	Dec 9, 2005
Grant date	Sep 22, 2009
Priority date	—
Expiry date	Oct 28, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2221/1094
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor device having upright dielectric nanotubes at an inter-layer dielectric level and method of manufacturing such a device is disclosed. The use of a catalyst is proposed in the disclosed manufacturing flow that facilitates growth of upright dielectric nanotubes having ultra low-k values that form all or part of the dielectric material for an ILD. In one embodiment, carbon nanotubes form interlayer conducting vias. In another embodiment dielectric material nanotubes form reinforcing pillars. The integration of catalysts is proposed to accommodate both upright dielectric and upright conducting nanotube fabrication in the same layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.