Modulation of stress in stress film through ion implantation and its application in stress memorization technique

US7592270B2 · kind B2 · utility

Assignee

• Chartered Semiconductor Manufacturing LTD · SG

Inventors

• Lee-Wee Teo · Singapore, SG
• Elgin Quek · Singapore, SG

Key dates

• Filing date: Nov 15, 2007
• Grant date: Sep 22, 2009
• Expiry date: Nov 15, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0184

Abstract

Some example embodiments of the invention provide a method to improve the performance of MOS devices by increasing the stress in the channel region. An example embodiment for a NMOS transistor is to form a tensile stress layer over a NMOS transistor. A heavy ion implantation is performed into the stress layer and then an anneal is performed. This increases the amount of stress from the stress layer that the gate retains/memorizes thereby increasing device performance.