Terraced film stack
US7595521B2 · kind B2 · utility
1Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2008 |
| Grant date | Sep 29, 2009 |
| Priority date | — |
| Expiry date | Nov 20, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process and apparatus directed to forming a terraced film stack of a semiconductor device, for example, a DRAM memory device, is disclosed. The present invention addresses etch undercut resulting from materials of different etch selectivity used in the film stack, which if not addressed can cause device failure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.