Patent · US Active

Independent bi-directional margin control per level and independently expandable reference cell levels for flash memory sensing

US7596037B2 · kind B2 · utility

4Cited by

2References

12Claims

0Family size

Assignee

Silicon Storage Technology, Inc. · US

Inventors

Vishal Sarin · Cupertino, US
Hieu Van Tran · San Jose, US
William Saiki · Mountain View, US

Key dates

Filing date	Sep 14, 2007
Grant date	Sep 29, 2009
Priority date	—
Expiry date	Nov 29, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG11C2211/5634
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory system includes reference level generators that may provide programmable margins, and programmable verify voltage levels. The reference levels may be shifted within a range of voltages with varying differences between reference voltage levels and with different margins and verify levels.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.