Integrated circuit package system with die and package combination
US7598606B2 · kind B2 · utility
71Cited by
18References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2005 |
| Grant date | Oct 6, 2009 |
| Priority date | — |
| Expiry date | Sep 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated package system with die and package combination including forming a leadframe having internal leads and external leads, encapsulating a first integrated circuit on the leadframe, and encapsulating a second integrated circuit over the first integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.