Patent · US Active

Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same

US7608499B2 · kind B2 · utility

19Cited by

1References

24Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Karla Romero · Dresden, DE
Sven Beyer · Dresden, DE
Jan Hoentschel · Dresden, DE
Rolf Stephan · Dresden, DE

Key dates

Filing date	Mar 14, 2007
Grant date	Oct 27, 2009
Priority date	—
Expiry date	Jan 31, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/038
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. Each of the first transistor element and the second transistor element comprises a gate electrode. A stressed material layer is deposited over the first transistor element and the second transistor element. The stressed material layer is processed to form from the stressed material layer sidewall spacers adjacent the gate electrode of the second transistor element and a hard mask covering the first transistor element. A pair of cavities is formed adjacent the gate electrode of the second transistor element. A pair of stress-creating elements is formed in the cavities and the hard mask is at least partially removed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.